1. Field of the Invention
The present invention relates to semiconductor digital circuits, and more particularly to level conversion circuits added to semiconductor circuits. Especially, the present invention relates to semiconductor digital circuits that are formed by connecting two inverters, each consisting of transistors that are complementarily connected between a power supply terminal and a grounding terminal, which are operated at different supply voltages.
2. Description of the Prior Art
In recent years, the short channeling has increasingly been advanced in semiconductor integrated circuits such as a dynamic RAM (DRAM), and by now the development has reached even to cover the submicron region. Accompanying this trend, such problem as the deterioration in the characteristics of the elements due to the implantation of the hot carriers into the transistor has become of concern, and the reduction of the supply voltage to the semiconductor integrated circuits has been implemented as a solution to this problem.
However, for connecting such a semiconductor integrated circuit to an existing peripheral circuit it becomes necessary to provide an interface mechanism which converts a low voltage to a high voltage.
A conventional level conversion circuit with the aforementioned kind of interface mechanism comprises a first and a second inverters each consisting of transistors that are complementarily connected between a power terminal and a grounding terminal, that are operated at different voltages. The output of a semiconductor digital circuit with a low logic swing level is applied to the input of the first inverter for low supply voltage, and the output of the first inverter is applied to the input of the second inverter for high supply voltage. An output signal with high logic swing level is taken out from the output of the second inverter.
For the second inverter it is normal to directly apply an external supply voltage through a terminal of the external power supply, and for the first inverter it is normal to apply the externally supplied source voltage after lowering it with an internal voltage reduction circuit.
In such a prior art semiconductor digital circuit, it is necessary to apply to the input of the second inverter a signal with a supply voltage which is higher than the voltage value obtained by subtracting the absolute value of the threshold voltage of the transistor that is connected to the supply voltage from the external supply voltage, in order to let the output of the second inverter to make a correct transition from the external supply voltage to zero volt.
The reason for this is that if the above-mentioned condition is not fulfilled, the complementarily connected two transistors that constitute the second inverter are both turned on, with the low level of the output signal not going to zero volt, a through current steadily flows continuously in the second inverter, so that the power consumption will be increased.
In addition, there was a problem that the setting range of the supply voltage for the first inverter is limited.